Phase failure detection system

ABSTRACT

A system for detecting single phase operation or total loss of power in a three phase electrical network. In this system, sensing circuits monitor the line-to-line voltages available from a three phase source of electric power. These sensing circuits cooperate with an indicating means to provide an indication upon the occurrence of either a phase failure or a total loss of power. The sensing circuit include monostable multivibrators which are connected across pairs of supply conductors connected with the output of the three phase source. These multivibrators provide output pulses of a predetermined time duration in response to input voltages exceeding a predetermined magnitude and, accordingly, the multivibrators are sequentially and periodically switched in accordance with the voltages provided by the three phase source. Thus, the three multivibrators connecting the various pairs of supply conductors produce time displaced pulses except during those periods when the three phase source ceases its three phase operation. By monitoring the output pulses from the three multivibrators, an indication is derived when the three phase source ceases its three phase operation.

United States Patent [72] Inventors Norman L. Traub Troy; Mark E.Preiser. Sterling Heights, both of. Mich. 21 Appl. No. 15,771 [22] FiledMar. 2, 1970 [45] Patented June 8, 1971 [73] Assignee General MotorsCorporation Detroit, Mich.

[54] PHASE FAILURE DETECTION SYSTEM 4 Claims, 6 Drawing Figs.

[52] U.S.Cl. 317/31, 317/27, 317/33, 317/46, 317/47, 317/36, 307/202[51] Int. Cl "02h 3/24 [50] Field of Search 317/27, 26, 31, 33, 46, 47,363071127, 130, 204, 202, 219; 328/96 [56] References Cited UNITEDSTATES PATENTS 2,393,043 1/1946 Harder 3 I7/26(X) 3,001,100 9/1961 Schuhv3l7/27(X) 3,157,826 11/1964 Norton 317/46 3,428,865 2/1969 OpadAttorneys-E. W. Christen, C. R. Meland and Albert F. Duke ABSTRACT: Asystem for detecting single phase operation or total loss of power in athree phase electrical network. In this system, sensing circuits monitorthe line-to-line voltages available from a three phase source ofelectric power. These sensing circuits cooperate with an indicatingmeans to provide an indication upon the occurrence of either a phasefailure or a total loss of power. The sensing circuit include monostablemultivibrators which are connected across pairs of supply conductorsconnected with the output of the three phase source. These'multivibrators provide output pulses of a predetermined time durationin response to input voltages exceeding a predetermined magnitude and,accordingly, the multivibrators are sequentially and periodicallyswitched in accordance with the voltages provided by the three phasesource. Thus, the three multivibrators connecting the various pairs ofsupply conductors produce time displaced pulses except during thoseperiods when the three phase source ceases its three phase operation. Bymonitoring the output pulses from the three multivibrators, anindication is derived when the three phase source ceases its three phaseoperation.

PATENTEUJUN 8l97l 3,584,259

SHEET 1 OF 2 INVHNTURS Mmzazzfl fazed, 8 BY M006 19225 (KKWM \NPUTOUTPUT INPUT 72 M CONDUCTOR78 m cONOUcTORaO CONDUCTOR a2 CON DUCTOR84CONDUCTORBG I' L l' OUTPUT88 TIME W MULTIVIBRATOR Y2 I L OUTPUTS OUTPUTOF N5 MULTlVIBRATOR Y2 OUTPUTS l l 5 ++TM wt ta E M0714 Lfqzz ATTORNFYPHASE FAILURE DETECTION SYSTEM This invention relates to a systemwherein a three phase source of electric power is monitored and anindication is provided when the source ceases to maintain-three phaseoperation. I 1

Under a variety of circumstances, detrimental affects can accompanysingle phase energization of a three phase load. For example, threephase induction motors can be damaged by the application of single phasepower. It is, therefore, desireable to ensure against single phaseoperation of such three phase loads.

In the past, various systems have been employed for monitoring thevoltage levels available from a three phase source. For example, acontrol signal can be developed by means of full wave rectification fthe voltages available from a three phase source. Cessation of threephase operation is accompanied by a detectable variance in the voltagemagnitude available from this full wave rectifier. A system of the typejust described is disclosed in the patent to Opad 3,242,383.

In contrastto the full wave rectifier approach of detectingv singlephase operation, the system of this invention utilizes three monostablemultivibrators that monitor or sense the three line-to-line voltages andproduce pulses in accordance with the various waveforms representing thethree line-to-line voltages. During normal operation, the pulses fromthe multivibrators are time displaced and the outputs from themultivibrators are never all simultaneously at the same voltage level.On the occurrence of a fault causing single phase operation, themultivibrators do provide output pulses simultaneously at the samevoltage level, thus indicating'single phase operation.

Accordingly, it is an object of the present invention to provide a phasefailure detection system wherein the voltage waveforms associated withathree phase source are monitored to ascertain the state of operation ofthe three phase source and an indication is provided when the sourcecommences single phase operation.

Another object of the present invention is to provide a phase failuredetection system wherein an indication of single phase operation isdeveloped in response to single phase operation by distinguishing theperiodicity of the waveforms available from the three phase sourceduring single phase operation from that normally associated with threephase operation. In this manner, the phase failure detection system isrelatively insensitive to variations in the voltage levels of thevoltages available on the supply conductors from the three phase source.

A further object of this invention is to provide a phase failuredetection system utilizing monostable multivibrators as set forth abovewherein an indication is provided when there is a complete power failureof the three phase source.

Another object of this invention is to provide a phase failure detectionsystem wherein logic gates are employed in monostable multivibratorconfigurations to produce signals of a predetermined duration inresponse to the periodically varying voltage waveforms available fromthe three phase source and further wherein an indicating means isprovided which responds to the signals to provide an indication if andonly if three phase operation terminates.

additional objects and advantages of this invention will be apparent inlight of the following description. The figures listed below areincorporated in the description and illustrate preferred embodiments ofthe present invention.

In the drawings:

FIG. 1 is a circuit diagram of a three phase AC induction motor systemprovided with a phase failure detection system made in accordance withthis invention.

FIG. 2 is a detailed circuit schematic of the phase failure detectionnetwork employed in the motor system of FIG. 1.

FIG. 3 is a circuit diagram of a single monostable multivibrator whichforms a part of the detection system illustrated in FIG. 2.

FIG. 4 is a set of characteristic curves illustrating the operation ofthe monostable multivibrator shown in FIG. 3.

FIG. 5 is a set of curves illustrating the operation of the phasefailure detection system of FIG. 2 during a period of normal operation.

FIG. 6 is a set of curves illustrating the operation of the phasefailure detection system of FIG. 2 during aperiod of single phaseoperation.

Referring now to the drawings and more particularly to FIG. 1, an ACinduction motor system is depicted with a phase failure detection systemfor ensuring against single phase operation. In this figure, a threephase constant frequency and constant power source 10 is'provided whichmay be, for example,'commercial three phase power delivered to a plantor other facility. For purposes of explanation, this source isillustrated as an alternating current generator which provides energy todrive an induction motor '12 having a rotor 14 connected with a load 16.

The three phase source 10 has an output winding comprised of phasewindings26, 28, and 30 connected in a Y configuration. The field circuitof this three phase source of electric power 10 comprises a switch 18, abattery 20, a field coil 22, and a voltage regulating device which maytake various conventional forms but for simplicity is shown as avariable resistor 24. This regulator 24 controls the magnitude of thevoltage available from the phase windings 26, 28, and 30 and maintainsit substantially constant in a manner known to those skilled in the art.

Three fuses F,, F,, and F are included in the output conductors of thepower source 10. The three phase windings 26, 28, and 30 are connectedwith the three fuses through the conductors 32, 34, and 36.

Three phase voltage is available at the output terminals 38, 40, and 42of the power source 10. Voltage XY is developed across terminals 38 and40, voltage YZ is developed across terminals 40 and '42, and voltage ZXis developed across terminals 42 and 38. These three terminals38, 40,and 42 are connected by three conductors 44, 46, and 48, respectively,with one side of three normally closed relay contacts CR CR and CR Threeconductors 50, 52, and 54 connect the opposite sides of the three relaycontacts with the three phase windings56, 58, and 60 of the motor 12.

From the above, it follows that the motor is supplied three phase powerduring those periods in which the three relay contacts are closed andthe source of electric power 10 has three phase voltage available at itsterminals. Assuming that voltage is available at the source, twocircumstances can interrupt power flow between the source and the motor.Either an open circuit resulting from one of the fuses F,, F or F or anopen relay contact will interrupt power flow.

A DC power supply 62 is connected across the supply conductors 46 and48. Thus, the input to the DC power supply is single phase. This singlephase AC is converted to a DC voltage by suitable rectifier means (notIllustrated) for the purpose of providing DC power to the phase failuredetection circuit 64 shown in FIG. I.

The phase failure detection circuit 64, which is described in detailhereinafter, has three input conductors denoted 66, 68, and 70. Thesethree conductors are connected respectively with the power supplyconductors 44, 46, and 48. The relay contacts CR CR and CR arecontrolled by the phase failure detection circuit 64. These contactsremain in their normally closed position until caused to change by asignal from the phase failure detection circuit 64. The contacts open ifand only if three phase operation ceases.

Referring now to FIG. 2, a detailed circuit schematic of the sensingcircuits employed in the phase failure detection circuit 64 of FIG. 1 isset forth. It is seen that the three input conductors 66, 68, and 70 areconnected to the primary windings of transformers T T and T These threeprimary windings are thereby connected with the power supply conductors44, 46, and 48 of FIG. 1 in a delta connection. Each of the transformersis connected across a pair of the supply conductors 44, 46,.and 48.Accordingly, each of the primaries of the transformers 1",, T and T isenergized by one of the three line-to-line voltages available from thesource of electric power. It is seen that the transformer T, isenergized by the voltage XY, the transformer T is energized by thevoltage YZ, and the transformer T, is energized by the voltage ZX.

Each of the secondary windings of the three transformers T,, T,, and T,is connected with identical circuitry. An RC filter network comprised ofa resistor R, and a capacitor C, is connected across each secondarywinding. A voltage divider comprised of a resistor R and a resistor R isincluded in the circuit of each secondary winding. A diode D, ensuresthat the juncture of the resistors R and R, does not assume a negativevoltage level.

It is noted that in FIG. 2 three identical monostable multivibratorconfigurations are illustrated. The input terminals of the threemonostable multivibrators are denoted 72, 74, and 76. Each of the threemonostable multivibrators includes three single input NAND gates N,, N,,and N and a two input NAND gate N,, a transistor 0,, a resistor R,, anda capacitor C Each of the NAND gates employed in the phase failuredetection system is of a conventional design commercially available andgenerally known to those skilled in the art. The operation of thesegates is characterized by a two level output whose level is dependent onthe level of the input voltages. The output is at its high level untiland unless each input assumes a voltage in excess of a predeterminedvalue. Thus, a three input NAND gate has a high level output when anyone of its inputs, or when any two of its inputs, or when all three ofits inputs are supplied voltages less than the requisite predeterminedminimum. The output is switched to its low value only when all three ofthe inputs are supplied voltages in excess of the requisite minimum.

The operation of the monostable multivibrator connected with thetransformer T, will now be described in detail with reference to FIGS. 3and 4, it being understood that identical operation obtains for each ofthe three monostable multivibrators. In regard to this description, itis pointed out that FIG. 3 illustrates a multivibrator circuit and FIG.4 illustrates the voltages at various points in the FIG. 3 circuit.

InFIG. 3, the output of the NAND gate N, is connected with one of theinputs to the NAND gate N, by a conductor 78. A conductor 80 connectsthe output of the NAND gate N, with the input of the NAND gate N,. Oneplate of a capacitor C, is connected with the output of the NAND gate Nby a conductor 82 and the other plate of the capacitor C, is connectedwith the base electrode of the transistor Q, by a conductor 84. Aresistor R, connects a DC voltage supply V to the base electrode of thetransistor 0,. The DC voltage V is obtained from a DC source which isnot illustrated. The emitter of the transistor 0, is connected with areference conductor shown as a ground. A conductor 86 connects thecollector electrode of the transistor 0, with the input of the NAND gateN The output from the monostable multivibrator is available at theoutput of the NAND gate N, on a conductor 88. Feedback is effected by aconductor 90 which connects the input of the NAND gate N, with theoutput conductor 88.

The voltage at the input 72 to the NAND gate N, is depicted graphicallyin FIG. 4. This voltage is derived from the line-toline voltage XY withwhich the transformer T, is connected. Line-to-Iine voltage XY isapplied to the primary winding of the transformer T,. The diode D, shownin FIG. 1 and noted above provides half-wave rectification of thevoltage available on the secondary winding of the transformer T,.Additionally, the voltage divider comprised of the resistors R, and R ofFIG. 1 and also noted above cause a reduction in the magnitude of thevoltage available on the secondary winding of the transformer T, to asuitable preselected value.

The single input NAND gate N, functions as an inverter. This NAND gateN, provides a high level output signal until and unless an input signalexceeding a predetermined voltage level is supplied to it. Accordingly,the voltage graph for the conductor 78 which is connected with theoutput of N, shows a high voltage level until the input sinusoid at theinput 72 exceeds a predetermined voltage magnitude. NAND gate N,switches in response to the input voltage and remains at its low outputlevel until the voltage input at input 72 falls below the necessarysustaining value.

The two input NAND gate N, provides a low output voltage until andunless one and/or the other of its inputs assumes a low level. As shownin the graph of FIG. 4, when the voltage on conductor 78 falls YZ, itslow level, to voltage on conductor 80 representing the output of the twoinput NAND gate N, assumes its high level. This high level on conductor80 is sustained until both the inputs to the two input NAND gate N, haveresumed high levels.

The single input NAND gate N functions as an inverter. The output ofthis NAND gate N, on conductor 82 is the opposite of the input of theNAND gate N, on conductor 80. Accordingly, as depicted graphically inFIG. 4, its voltage waveshape is the inverse of that shown for conductor80.

The voltage on conductor 84, as shown in FIG. 4, has an exponentiallyvarying level. This exponential variation derives from the RC chargingnetwork comprising the resistor R, and the capacitor C Transistor Q, isbiased to its conductive mode by voltage available to its base electrodefrom conductor 84. Accordingly, the transistor is nonconductive onlyduring the period of time of the transient voltage on conductor 84.While the transistor is turned off, the voltage on conductor 86 is atits high level.

The single input NAND gate N, functions as a voltage inverter. An outputis available on conductor 88 only while the input to the NAND gate N, isat its low level. When the input to N, on the conductor 86 switches toits high level, the NAND gate N switches and the output on conductor 88falls to its low level. This output from conductor 88 is coupled to thetwo input NAND gate N, by conductor 90. The low voltage on conductor 88is, therefore, maintained until the transistor resumes its on conditionwhen the RC network attains steady state. This time increment isdetermined by the time constant of the RC charging network which dependson the values of the resistor R, and the capacitor C Thus, it is seenthat a low level output is available on conductor 88 for a predeterminedtime duration when an input signal exceeding a predetermined voltagelevel is applied.

As noted above, each of the three monostable multivibrators depicted inFIG. 2 operates in a manner identical with the operation of the FIG. 3example. Since the input voltages to the three multivibrators are timedisplaced, the respective low level output pulses associated therewithare likewise time displaced. Hence, the three sensing circuits providetime displaced output pulses.

The combined operation of the three monostable multivibrators of FIG. 2is set forth in FIGS. 5 and 6. The half wave rectified sinusoidsassociated with normal three phase operation are depicted in FIG. 5. Thevarious waveforms are denoted XY, YZ, and ZX to correlate them with thethree Iine-to-Iine voltages available from the three phase source. Theoutputs of the three monostable multivibrators are depicted in FIG. 5and they are also labeled XY, YZ, and ZX to correlate them with theirrespective Iine-to-Iine voltages. Multivibrator output XY corresponds tothe voltage on conductor 88 shown in FIG. 4. It is seen that the lowlevel output pulses developed by the three monostables connected withthe various phases are, as noted above, time displaced. It is noted thatat no time do all three monostable multivibrators simultaneously providehigh level outputs when the system is operating normally.

FIG. 6 depicts the operation when the system is single phasing. In FIG.6, it is assumed that the fuse F, has opened to cause this mode ofoperation. Accordingly, the single phase available from the source ll ofFIG. 1 is phase YZ. The signals obtained from the three pairs of supplyconductors are depictedgraphically in FIG. 6. They are voltage YZ whichis the single phase available and voltages XY and ZX which are relatedto the YZ voltage. It is noted that the sum of voltages XY and ZX isequal in magnitude to and 180 time displaced from the voltage YZ. Thisrelationship follows since the voltages XY and ZX are developed acrossthe phase windings 58 and 60 which are supplied the single phase voltageYZ. The two phase windings comprise a voltage divider with the voltageYZ being the voltage applied to the voltage divider and the voltages XYand ZX being the voltages across the two components of the voltagedivider.

In FIG. 6, the outputs of the three multivibrators are shown duringsingle phase operation. The output of the multivibrator YZ is notaltered from that associated with normal three phase operation. However,the outputs from the multivibrators monitoring the line-to-line voltagesXY and ZX differ from those in FIG. 5 as a result of the modifiedvoltage waveforms of voltages XY and ZX. The multivibrators operate inthe manner described above and, accordingly, their outputs are relatedto the inputs available. Accordingly, there is an overlap time intervalduring which all three multivibrator outputs provide a high level, forexample, the time interval 1, to 1, shown in FIG. 6.

Referring again to FIG. 2, it is noted that the three outputs 88, 92,and 94 of the three monostable multivibrators are fed to a detectingmeans comprising a single three input NAND gate N,,. This NAND gate N,provides a high level output until and unless all three of the inputsare supplied voltage signals in excess of a predetermined minimumvoltage level. Accordingly, as shown in FIG. 5, during normal operation,the output of the NAND gate N, is maintained constant at its high level.By contrast and as illustrated in FIG. 6, when the voltage sourcecommences single phase operation, the output of the NAND gate N, isperiodically interrupted. In this manner, single phase operation isdetected since the output from the NAND gate N, periodically assumes itslow level.

The relay coil 95 of FIG. 2 controls contacts CR,, CR,, and CR, and,therefore, provides an indication of single phase operation by openingthese three relay contacts CR,, CR and CR, in the supply conductors ofthe motor system of FIG. 1 when single phase operation occurs. Duringnormal operation of the three phase source, no signal is provided therelay coil and the contacts remain in their normal closed position. Onthe occurrence of phase failure, the relay 95 is energized by a voltagesource V (not shown) through transistor Q, and the contacts switch totheir open position. The state of transistor 0 is controlled bycircuitry described hereinafter.

The two input NAND gates N, and N, and the single input NAND gate N,cooperate with a resistor R, and a transistor O in the control of therelay coil 95. The diode D provides a shunt path with the relay 95. Atime delay is effected by the coaction of a transistor 0,, a capacitorC, and the resistors R,, R,, and R,

The time delay network noted above introduces a delay in the applicationof a high voltage level on conductor 96 to ensure against false relaytrippings which could accompany the initial period of operation. Whenthe motor system of FIG. 1 is initially energized, this time delaycauses a delay of a predetermined duration in the operation of the phasefailure detection circuit. The DC voltage source 62 supplies thepotential V necessary to energize the transistor 0,. When the voltage Vis initially applied, the capacitor C is uncharged and the voltage onconductor 96 is effectively at ground. Upon the application of voltage Vthe bias network comprising resistor R, and R, provides a bias to thebase Electrode of the transistor 0,. The resistor R, connects thecollector electrode of the transistor 0, with the source of DC voltage VAccordingly, the transistor 0, is biased to saturation and the capacitorC, commences charging with a time constant determined by the resistanceR, combined with the emitter-collector resistance of the transistor 0,.After a predetermined time lapse, the voltage on conductor 96 assumes avoltage magnitude sufficient to provide a high level input to the NANDgate N,. This high voltage level is maintained throughout the operatingperiod and terminates only when the system is deenergized. Thus, it isseen that this time delay affords a delay upon the initial energizationand is of no consequence to the operation of the phase failure detectioncircuit thereafter.

In operation, the two input NAND gates N, and N, provide a switchfunction with a memory. The output from this switch is available onconductor 100. This output is at a high level until and unless bothinputs to the NAND gate N, assume high levels. As explained above, theinput to the gate N from the conductor 96 is at its high level exceptfor a short period following the initial energization of the system. Theoutput from the gate N, available on the conductorl00 is initially atits high level. This output is connected by the conductor 99 with aninput to the gate N, Thus, it is seen that the output from gate N, onthe conductor 97 remains at its low level until and unless the signal onthe conductor 98 assumes a low level. When the signal on the conductor98 switches to its low level, the output from the gate N, will switch toits high level. This output is connected through the conductor 97 withone of the inputs to the gate N,. Hence, the output from the gateN,switches to its low level when the signal on the conductor 98 assumes alow level. The conductor 99 connects this low level with the input tothe gate N, thus ensuring a continued high level output from the gateN,. Accordingly, the signal available on conductor 100 is determined bythe output available from the NAND gate N, on the conductor 98. When thevoltage available on conductor 98 assumes a low level, it causes thevoltage available on the conductor 100 to assume a low level. As aresult of the memory function, the voltage on conductor 100 will remainat its low level until the system is deenergized.

When the voltage available on the conductor 100 assumes a low level, itcauses the single input NAND gate N, to have an output voltage at itshigh level. This follows since the NAND gate N, functions as an inverterproviding a high level output when supplied a low level input. Theoutput voltage available from the NAND gate N, is coupled to the baseelectrode of the transistor 0, through the resistor R,. In this manner,transistor O is switched on in response to single phase operation of thethree phase source. When the transistor 0 is rendered conductive, therelay is energized by the source V, and the relay contacts CR,, CR andCR, open.

It is noted that the voltage source 62 in FIG. I includes a conventionalfilter capacitor (not shown) which stores sufficient energy to enablethe voltage source 62 to supply a DC voltage of sufficient duration forthe system to respond to single phase operation even if one of both ofthe fuses F or F, in FIG. I is opened. The relay 95 in FIG. 2 is amechanically latching relay and, accordingly, remains actuated onceenergized in response to the sensing circuits. Voltage source V, in FIG.2 also includes a conventional filter capacitor (not shown) which storessufficient energy to enable the voltage source V to supply a DC voltageof sufficient duration f r the system to respond to single phaseoperation and, accordingly, the relay 95 is provided voltage from thesource V regardless of the state of the three phase system.

In view of the foregoing, it is seen that three sensing circuitsincluding three monostable multivibrators are provided which switchsequentially and periodically in accordance with the three line-to-linevoltages associated with a three phase source of electric power. Duringperiods of normal operation, the outputs of the three multivibratorsnever assume high values simultaneously. When the three phase sourcecommences single phase operation upon the opening of a fuse or in theevent of some other failure, the three multivibrators sensing thevoltage waveforms provide concurrent high level outputs during limitedtime intervals. The NAND gate N, which senses the three outputs providescontrasting output signals during normal and single phase operation. Asshown in FIG, 5, the output of the NAND gate N is constant at a highlevel during normal operation; but, during single phase operation, theoutput of the NAND gate N, periodically assumes a low level as shown inFIG. 6. The switch comprised of the NAND gates N,

and N, responds to the low level output from the NAND gate N by causingthe NAND gate N to apply a bias signal to the transistor 0,. When thetransistor is biased conductive by this bias signal from the gateN,,,-the relay coil 95 is energized and mechanically latched and thecontacts CR,, CR and CR are opened.

ln the event the three phase source, after a period of normal operation,ceases operation entirely, the phase failure detection system ofthis-invention will respond by causing the relay contacts CR,-, CR andCR to open. Upon the occurrence of this total lossof power, no voltageis available on any of the conductors 44, 46, and 48 of FIG. 1.Accordingly, the inputs to the three monostable multivibrators will allbe zero. As shown'in the graph of FIG. 4, the output of themultivibrators is at a high level until switched by an input signal to alow level. Under conditionsof total power failure, no input signal isprovided any of the three multivibrators and, accordingly, eachmaintains a continuous constant high level output. As

noted above in the explanation directed to detection of single phaseoperation, the NAND gate N responds to three simultaneous high levelinputs from the multivibrators. in the situation where there has been atotal loss of power, the response of the NAND gate N causes the relay 95of FIG. 2 to open the relay contacts in a manner identical with thatdescribed above for detection of single phase operation.

Thus, it is seen that the phase failure detection system of thisinvention responds to a failure of one, two, or all three phases of athree phase system by opening relay contacts provided in the supplyconductors. The various DC power supplies which provide energy for theoperation of the detection system include conventional filter capacitorswhich store sufficient energy to supply a DC voltage of sufficientduration for the system to respond even if the input voltage to thepower supplies is interrupted by the system malfunction to be detected.Once the system responds, there is no further need for electric power.since the relay which is actuated has a mechanical latching means whichmaintains the relays contacts in their open position until manuallyreset.

We claim:

1. A phase failure detection system for detecting phase failure in apolyphase power supply system, comprising: a polyphase source ofalternating current connected with a plurality of power supplyconductors; a plurality of sensing circuits, each of said sensingcircuits including a switching means capable of providing a pulsatingoutput signal comprised of a series of substantially rectangular pulsesin response to a sinusoidal input signal; means connecting each of saidsensing circuits across a different pair of said supply conductorswhereby, the line-to-line voltages available on said supply conductorsare simultaneously monitored by said sensing circuits and said sensingcircuits are sequentially switched in accordance with the periodicwaveforms of the line-to-line voltages, the substantially rectangularoutput signals of said sensing circuits having a first predeterminedphase relationship when said system provides normal polyphase operationand a different predetermined phase relationship when a phase failureoccurs; detection means connected with the outputs of said sensingcircuits for simultaneously monitoring the outputs of all of saidsensing circuits, said detection means including a switching meansresponsive to the phase relationship of said sensing circuit outputsignals and providing an output signal when said sensing circuit outputsignals have said different predetermined phase relationship; andindicating means connected with the output of said detection means forproviding an indication in response to a phase failure.

2. A phase failure detection system for detecting phase failure in athree phase power supply, comprising: a three phase source of electricpower having three output terminals; three supply conductors connectedrespectively with said output terminals; a transformer having threeprimary windings and three secondary windings; means connecting saidprimary windings in a delta-connection with said supply conductors;three gate means, each of said gate means capable of providing apulsating output signal having pulses of predetermined duration inresponse to a sinusoidal input signal; means connecting each of saidgate means with a different one of said secondary windings whereby, theline-to-line voltages available on said supply conductors sequentiallyenable each of said gate means in accordance with the periodic waveformof the respective line-to-line voltage coupled to the input of the gatemeans, the pulsating output signals of said gate means having a firstpredetermined phase relationship when said system provides normal threephase operation and a different predetermined phase relationship when aphase failure occurs; detection means connected with the outputs of saidgate means for simultaneously monitoring the outputs of all three ofsaid gate means, said detection means including a switching meansresponsive to the phase relationship of said gate means output signalsand providing an output signal when said gate means output signals havesaid different predetermined phase relationship; and indicating meansconnected with the output of said detection means for providing anindication in response to a phase failure.

3. A phase failure detection system for detecting phase failure in athree phase power supply, comprising: a three phase source of electricpower having three output terminals; three supply conductors connectedrespectively with said output terminals; a transformer having threeprimary windings and three secondary windings; means connecting saidprimary windings in a delta connection with said supply conductors;three gate means, each of said gate means capable of providing apulsating output signal comprised of a series of rectangular pulses ofpredetermined pulse width in response to a sinusoidal input signal;means connecting each of said gate means with a different one of saidsecondary windings whereby, the line-to-line voltages available on saidsupply conductors sequentially switch each of said gate means and saidgate means provide said time displaced rectangular output pulses inaccordance with the periodic waveforms of the respective line-to-linevoltages coupled to the inputs of the gate means, the pulsating outputsignals of said gate means having a first predetermined phaserelationship when said system provides normal three phase operation anda different predetermined phase relationship when a phase failureoccurs; detection means connected with the outputs of said gate meansfor simultaneously monitoring the outputs of all three of said gatemeans, said detection means including a switching means responsive tothe phase relationship of said gate means output signals and providingan output signal if said gate means output signals have said differentpredetermined phase relationship; and indicating means connected withthe output of said detection means for providing an indication inresponse to a phase failure.

4. A phase failure detection system for monitoring a three phase powersupply and for providing an indication if the source fails to maintainthree phase operation, comprising: a three phase source of electricpower having three output terminals; three supply conductorsconnectedrespectively with said output terminals; a transformer having threeprimary windings and three secondary windings; means connecting saidprimary windings in a delta connection with said supply conductors;three gate means, each of said gate means capable of providing apulsating output signal comprised of a series of rectangular pulses ofpredetermined pulse width in response to a sinusoidal input signal;means connecting each of said gate means with a different one of saidsecondary windings whereby, the line-to-line voltages available on saidsupply conductors sequentially switch each of said gate means and saidgate means provide said time displaced rectangular output pulses inaccordance with the periodic waveforms of the respective line-to-linevoltages coupled to the inputs of the gate means, the pulsating outputsignals of said gate means having a first predetermined phaserelationship when said system provides normal three phase operation anda different predetermined phase relationship when a phase failureoccurs; each of said gate means providing a constant continuousoutpredetermined phase relationship to indicate single phase operationor said constant continuous output to indicate total loss of power; andindicating means connected with the output of said detection means forproviding ,an indication in response to single phase operation or atotal loss of power.

1. A phase failure detection system for detecting phase failure in apolyphase power supply system, comprising: a polyphase source ofalternating current connected with a plurality of power supplyconductors; a plurality of sensing circuits, each of said sensingcircuits including a switching means capable of providing a pulsatingoutput signal comprised of a series of substantially rectangular pulsesin response to a sinusoidal input signal; means connecting each of saidsensing circuits across a different pair of said supply conductorswhereby, the line-to-line voltages available on said supply conductorsare simultaneously monitored by said sensing circuits and said sensingcircuits are sequentially switched in accordance with the periodicwaveforms of the line-to-line voltages, the substantially rectaNgularoutput signals of said sensing circuits having a first predeterminedphase relationship when said system provides normal polyphase operationand a different predetermined phase relationship when a phase failureoccurs; detection means connected with the outputs of said sensingcircuits for simultaneously monitoring the outputs of all of saidsensing circuits, said detection means including a switching meansresponsive to the phase relationship of said sensing circuit outputsignals and providing an output signal when said sensing circuit outputsignals have said different predetermined phase relationship; andindicating means connected with the output of said detection means forproviding an indication in response to a phase failure.
 2. A phasefailure detection system for detecting phase failure in a three phasepower supply, comprising: a three phase source of electric power havingthree output terminals; three supply conductors connected respectivelywith said output terminals; a transformer having three primary windingsand three secondary windings; means connecting said primary windings ina delta-connection with said supply conductors; three gate means, eachof said gate means capable of providing a pulsating output signal havingpulses of predetermined duration in response to a sinusoidal inputsignal; means connecting each of said gate means with a different one ofsaid secondary windings whereby, the line-to-line voltages available onsaid supply conductors sequentially enable each of said gate means inaccordance with the periodic waveform of the respective line-to-linevoltage coupled to the input of the gate means, the pulsating outputsignals of said gate means having a first predetermined phaserelationship when said system provides normal three phase operation anda different predetermined phase relationship when a phase failureoccurs; detection means connected with the outputs of said gate meansfor simultaneously monitoring the outputs of all three of said gatemeans, said detection means including a switching means responsive tothe phase relationship of said gate means output signals and providingan output signal when said gate means output signals have said differentpredetermined phase relationship; and indicating means connected withthe output of said detection means for providing an indication inresponse to a phase failure.
 3. A phase failure detection system fordetecting phase failure in a three phase power supply, comprising: athree phase source of electric power having three output terminals;three supply conductors connected respectively with said outputterminals; a transformer having three primary windings and threesecondary windings; means connecting said primary windings in a deltaconnection with said supply conductors; three gate means, each of saidgate means capable of providing a pulsating output signal comprised of aseries of rectangular pulses of predetermined pulse width in response toa sinusoidal input signal; means connecting each of said gate means witha different one of said secondary windings whereby, the line-to-linevoltages available on said supply conductors sequentially switch each ofsaid gate means and said gate means provide said time displacedrectangular output pulses in accordance with the periodic waveforms ofthe respective line-to-line voltages coupled to the inputs of the gatemeans, the pulsating output signals of said gate means having a firstpredetermined phase relationship when said system provides normal threephase operation and a different predetermined phase relationship when aphase failure occurs; detection means connected with the outputs of saidgate means for simultaneously monitoring the outputs of all three ofsaid gate means, said detection means including a switching meansresponsive to the phase relationship of said gate means output signalsand providing an output signal if said gate means output signals havesaid different predetermined phase relationship; and indicating meAnsconnected with the output of said detection means for providing anindication in response to a phase failure.
 4. A phase failure detectionsystem for monitoring a three phase power supply and for providing anindication if the source fails to maintain three phase operation,comprising: a three phase source of electric power having three outputterminals; three supply conductors connected respectively with saidoutput terminals; a transformer having three primary windings and threesecondary windings; means connecting said primary windings in a deltaconnection with said supply conductors; three gate means, each of saidgate means capable of providing a pulsating output signal comprised of aseries of rectangular pulses of predetermined pulse width in response toa sinusoidal input signal; means connecting each of said gate means witha different one of said secondary windings whereby, the line-to-linevoltages available on said supply conductors sequentially switch each ofsaid gate means and said gate means provide said time displacedrectangular output pulses in accordance with the periodic waveforms ofthe respective line-to-line voltages coupled to the inputs of the gatemeans, the pulsating output signals of said gate means having a firstpredetermined phase relationship when said system provides normal threephase operation and a different predetermined phase relationship when aphase failure occurs; each of said gate means providing a constantcontinuous output of like polarity in the absence of input signals fromsaid secondary windings; detection means connected with the outputs ofsaid gate means for simultaneously monitoring the outputs of all threeof said gate means, said detection means including a switching meansresponsive to the output signals provided by said gate means andproviding an output signal if said gate means output signals have eithersaid different predetermined phase relationship to indicate single phaseoperation or said constant continuous output to indicate total loss ofpower; and indicating means connected with the output of said detectionmeans for providing an indication in response to single phase operationor a total loss of power.